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Electrical Design with the Intel® QuickPath Interconnect
By David Coleman and Michael Mirmak |
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Welcome to the era of the Intel® QuickPath Interconnect!
Mastering High Performance Multiprocessor Signaling explains the electrical design, board layout, test & measurement, and validation elements involved in implementing the Intel QuickPath Interconnect, the foundation of future generations of Intel® microprocessor systems, using a high speed, packetized, point-to-point system interconnect that uses multiple narrow high speed differential links to stitch together processors into a fabric of a distributed shared memory-style platform architecture.
Creating circuits for the very high speeds demanded by today’s computers require skill sets that are not commonly provided by conventional electrical engineering education. Differential signaling is now the fundamental technology enabling high speed, microwave frequency data rates. Signaling speeds of Intel QuickPath Interconnect are now so high, transmission channel artifacts such as frequency dependent attenuation, ringing and crosstalk will have an influence across several bits of transmitted data.
Mastering High Performance Multiprocessor Signaling is written by Intel experts who explain the new concepts and vocabulary of this new domain and relate their insights and experience, thoroughly explaining each step from design through validation, so that electrical circuit developers can directly apply the information contained here to produce high quality products that meet the demanding time-to-market requirements of the computer industry today.
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"Mastering High Performance Multiprocessor Signaling nicely brings together an explanation of the various components of an Intel® QuickPath Interconnect link: driver, channel, and receiver, and the trade-offs that need to be made to achieve a successful differential serial communications link."
- Thomas Walley, Project Manager, Avago Technologies
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"Mastering High Performance Multiprocessor Signaling provides a very good introduction to the principles of high speed differential serial circuit design. It quickly dives into how those principles specifically apply to designing with the Intel® QuickPath Interconnect."
- Aubrey Sparkman, SparkRight Solutions
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Dave Coleman is a Staff Platform Application Engineer at Intel with 22 years of electrical design, modeling and simulation experience. He specializes in enabling and integration of customer Intel QuickPath Interconnect designs in Intel® Server platforms. Dave is the co-author of the book PCI Express Electrical Interconect Design published by Intel Press and has contributed articles to Printed Circuit Design magazine. Dave has previously developed platform design guidelines for PCI Express* and InfiniBand* technology platform applications, and served on the PCI Express Gen1 and Gen2 Cabling workgroups.
Michael Mirmak is a Technical Marketing Engineer at Intel Corporation. He has been involved with signal integrity modeling and simulation since 1996, developing platform guidelines and models for both processor and chipset products, in desktop, mobile and server applications. He has been a participant in the IBIS (I/O Buffer Information Specification) Open Forum since 2000 and has been the organization's chair since June of 2003. Michael was a major contributor to the ICM and IBIS 4.1 - 5.0 specifications and also served as the senior editor for the IBIS Modeling Cookbook for Version 4.0. Michael's writing has appeared in the EE Times and he has released numerous presentations on technical and standards topics on the Internet. Michael holds a BSEE from the University of Pennsylvania. He currently lives in Folsom, California.
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