Today’s broad spectrum of electronic products such as microprocessors, chipsets, flash memories, wireless radios, and embedded logic all require cost-effective electronic packages. The electronic package is a space transformer between chips and low-cost motherboards.

Electronic package technology has advanced rapidly over the past two decades to meet the demands of faster and more powerful microprocessors with hundred of millions of transistors. The newest microprocessor products are dual core, providing two execution cores in one physical microprocessor. Multi-cores will continue as a trend from dual cores and will require highly advanced electronic package technology. Thermal-heat dissipation, signal interconnects, and higher densities have also necessitated many changes. Significant advances have been made in the areas of mechanical integrity, new materials, signal integrity, power delivery, power dissipation, and thermal sciences.

The eight papers in this Intel Technology Journal (Volume 9, Issue 4) present an in-depth discussion on Intel’s latest electronic package technologies. They highlight the technical challenges engineers face now and in the future, and address the many hurdles faced by the semiconductor industry to achieve the next level of performance along the curve of Moore’s Law.

The first paper provides an overview of advanced package technologies for today’s high-performance computers. The next four papers look at electrical, thermal, mechanical, and new materials advances. The challenge of supplying the appropriate power at the right time, in a cost-effective and efficient method, is discussed in the second paper on power delivery. Then there is the need to cool the package and dissipate this power. The third paper on thermal technologies outlines some novel nano and micro technologies currently being investigated at Intel to mitigate the impact of power and power-density distribution across the chip. The component typically undergoes different levels of static and dynamic thermal and mechanical loads. The fourth paper on interconnect reliability provides an insight into the mechanical response and integrity of the silicon, package, and board. The fifth paper follows with a description of package materials technologies to address increasingly demanding thermo-mechanical conditions.

The next three papers look at present and future package technologies. In the sixth paper, the Pentium^® 4 Processor’s Land-Grid-Array (LGA) package technology is discussed. The seventh paper looks at some of the metrologies, tools, and techniques to better quantify the mechanical response for fault isolation and failure analysis in current and future package technologies. Finally, in the eighth paper, new concepts in package technologies for wireless and RF are described.