Technology & Research

Intel® Technology Journal Home

Volume 12, Issue 03

Original 45nm Intel® Core™ Microarchitecture


Intel Technology Journal - Featuring Intel's recent research and development

ISSN 1535-864X DOI 10.1535/itj.1203.02

  • Volume 12
  • Issue 03
  • Published November 7, 2008

Original 45nm Intel® Core™ Microarchitecture

  Section 5 of 10  

Power Management Enhancements in the 45nm Intel® Core™ Microarchitecture

RESULTS

DPD

Average power on the Penryn mobile processor was benchmarked using the MobileMark® 2005 (MM05) battery life benchmark. The benefit of DPD is shown in (Figure 7) . These measurements were done on multiple Penryn processor parts with varying leakage power behavior. DPD reduced the average power by approximately 40 percent or more on most of the parts tested. This testing was done on Intel Customer Reference Board platforms using a fresh build of Windows XP* and the MM05 benchmark according to the guidelines specified by BAPCO* [6] . The processor power was measured by sensing the processor voltage and current during the MM05 run and averaging it.



Figure 7: DPD power savings

Deeper sleep in mobile quad core processors

The same measurements as for DPD (listed above) were done for mobile quad-core processors. The average power on MM05 under Windows XP* was within 15–30 percent of the dual-core processors.

CC3 in servers

CC3 power-saving measurements were done on the Intel Customer Reference Board platform with the Seaburg chipset and ESB2. The dual-processor CPUs based on Intel Xeon® technology, from the Penryn family of processors, at 3.2 GHz with a 1600MHz Front Side Bus (FSB) had two processors installed in the system for the tests. The server workloads were applied by SPECpower_ssj2008. The power saving was compared to the case in which only C1E was enabled and CC3 was not enabled. These configuration changes were made using the Intel BIOS options to enable and disable CC3. The savings range from 0 percent at complete idle to a savings of 10–20 percent at medium loads. The savings decrease at maximum loaded conditions as the idle time in C1E and CC3 decreases. This is shown in (Figure 8) .



Figure 8:

Deeper sleep in desktop platforms

The measurements for idle power improvements were measured on the Intel Desktop Customer Reference board with dual-core and quad-core desktop processors from the Penryn family of processors. These measurements were done under operating system idle conditions. The idle power decrease from Autohalt Stop Grant to Deeper Sleep state was in the range of 40 percent–60 percent.

  Section 5 of 10  

Back to Top

In this article

Download a PDF of this article.